merge queue: checking #10630 on trunk (0c7c121), stacked on #10719

CHANGELOG.md

@@ -319,6 +319,10 @@ By @sagudev in [#10307](https://github.com/gfx-rs/wgpu/pull/10307).
 
 - Cache adapter and device limits, features, and adapter info on the browser WebGPU backend, so repeated calls no longer re-read those JavaScript objects. By @apetrock in [#10513](https://github.com/gfx-rs/wgpu/pull/10513).
 
+#### Metal
+
+- A render pipeline switch no longer allocates once per vertex buffer. By @samoylenkodmitry in [#10630](https://github.com/gfx-rs/wgpu/pull/10630).
+
 ### Documentation
 
 #### General

cts_runner/revision.txt

@@ -1 +1 @@
-9c85c658990fb1055ee6bb60deee140b5b76eb89
+b009414b0d1c9c57af3ff0b37477c0bcf736428c

wgpu-hal/src/metal/device.rs

@@ -1567,7 +1567,7 @@ impl crate::Device for super::Device {
                             immediates: desc.layout.immediates_infos.vs,
                             sizes_slot: desc.layout.per_stage_map.vs.sizes_buffer,
                             sized_bindings: vs.sized_bindings,
-                            vertex_buffer_mappings,
+                            vertex_buffer_mappings: vertex_buffer_mappings.into(),
                             library: Some(vs.library),
                             raw_wg_size: MTLSize {
                                 width: 0,
@@ -1661,7 +1661,7 @@ impl crate::Device for super::Device {
                             immediates: desc.layout.immediates_infos.ts,
                             sizes_slot: desc.layout.per_stage_map.ts.sizes_buffer,
                             sized_bindings: ts.sized_bindings,
-                            vertex_buffer_mappings: vec![],
+                            vertex_buffer_mappings: Default::default(),
                             library: Some(ts.library),
                             raw_wg_size: ts.wg_size,
                             work_group_memory_sizes: ts.wg_memory_sizes,
@@ -1690,7 +1690,7 @@ impl crate::Device for super::Device {
                             immediates: desc.layout.immediates_infos.ms,
                             sizes_slot: desc.layout.per_stage_map.ms.sizes_buffer,
                             sized_bindings: ms.sized_bindings,
-                            vertex_buffer_mappings: vec![],
+                            vertex_buffer_mappings: Default::default(),
                             library: Some(ms.library),
                             raw_wg_size: ms.wg_size,
                             work_group_memory_sizes: ms.wg_memory_sizes,
@@ -1733,7 +1733,7 @@ impl crate::Device for super::Device {
                         immediates: desc.layout.immediates_infos.fs,
                         sizes_slot: desc.layout.per_stage_map.fs.sizes_buffer,
                         sized_bindings: fs.sized_bindings,
-                        vertex_buffer_mappings: vec![],
+                        vertex_buffer_mappings: Default::default(),
                         library: Some(fs.library),
                         raw_wg_size: MTLSize {
                             width: 0,
@@ -1941,7 +1941,7 @@ impl crate::Device for super::Device {
                 immediates: desc.layout.immediates_infos.cs,
                 sizes_slot: desc.layout.per_stage_map.cs.sizes_buffer,
                 sized_bindings: cs.sized_bindings,
-                vertex_buffer_mappings: vec![],
+                vertex_buffer_mappings: Default::default(),
                 raw_wg_size: cs.wg_size,
                 work_group_memory_sizes: cs.wg_memory_sizes,
             };

wgpu-hal/src/metal/mod.rs

@@ -1151,8 +1151,8 @@ struct PipelineStageInfo {
     /// See `device::CompiledShader::sized_bindings` for more details.
     sized_bindings: Vec<(naga::ResourceBinding, u32)>,
 
-    /// Info on all bound vertex buffers.
-    vertex_buffer_mappings: Vec<naga::back::msl::VertexBufferMapping>,
+    /// Info on all bound vertex buffers, shared with the pipeline.
+    vertex_buffer_mappings: Arc<[naga::back::msl::VertexBufferMapping]>,
 
     /// The workgroup size for compute, task or mesh stages
     raw_wg_size: MTLSize,
@@ -1186,7 +1186,7 @@ impl PipelineStageInfo {
         self.immediates = None;
         self.sizes_slot = None;
         self.sized_bindings.clear();
-        self.vertex_buffer_mappings.clear();
+        self.vertex_buffer_mappings = Default::default();
         self.library = None;
         self.work_group_memory_sizes.clear();
         self.raw_wg_size = MTLSize {
@@ -1201,9 +1201,7 @@ impl PipelineStageInfo {
         self.sizes_slot = other.sizes_slot;
         self.sized_bindings.clear();
         self.sized_bindings.extend_from_slice(&other.sized_bindings);
-        self.vertex_buffer_mappings.clear();
-        self.vertex_buffer_mappings
-            .extend_from_slice(&other.vertex_buffer_mappings);
+        self.vertex_buffer_mappings = Arc::clone(&other.vertex_buffer_mappings);
         self.library = Some(other.library.as_ref().unwrap().clone());
         self.raw_wg_size = other.raw_wg_size;
         self.work_group_memory_sizes.clear();