feat: make hermit-entry optional

src/arch/aarch64/kernel/interrupts.rs

@@ -19,7 +19,7 @@ use crate::arch::aarch64::kernel::scheduler::State;
 use crate::arch::aarch64::kernel::serial::handle_uart_interrupt;
 use crate::arch::aarch64::mm::paging::{self, BasePageSize, PageSize, PageTableEntryFlags};
 use crate::drivers::InterruptHandlerMap;
-use crate::env;
+use crate::env::{self, BootInfoExt};
 use crate::mm::{PageAlloc, PageRangeAllocator};
 use crate::scheduler::{self, CoreId, timer_interrupts};
 
@@ -266,7 +266,7 @@ pub fn wakeup_core(core_id: CoreId) {
 pub(crate) fn init() {
 	info!("Initialize generic interrupt controller");
 
-	let fdt = env::fdt().unwrap();
+	let fdt = env::start_info().fdt().unwrap();
 
 	let intc_node = fdt.find_node("/intc").unwrap();
 	let mut reg_iter = intc_node.reg().unwrap();
@@ -445,7 +445,7 @@ pub fn init_cpu() {
 	GicCpuInterface::enable_group1(true);
 	GicCpuInterface::set_priority_mask(0xff);
 
-	let fdt = env::fdt().unwrap();
+	let fdt = env::start_info().fdt().unwrap();
 
 	if let Some(timer_node) = fdt.find_compatible(&["arm,armv8-timer", "arm,armv7-timer"]) {
 		let irq_slice = timer_node.property("interrupts").unwrap().value;

src/arch/aarch64/kernel/mmio.rs

@@ -36,6 +36,7 @@ use crate::drivers::virtio::transport::mmio as mmio_virtio;
 use crate::drivers::virtio::transport::mmio::VirtioDriver;
 #[cfg(feature = "virtio-vsock")]
 use crate::drivers::vsock::VirtioVsockDriver;
+use crate::env::BootInfoExt;
 #[cfg(feature = "virtio-net")]
 use crate::executor::device::NETWORK_DEVICE;
 use crate::init_cell::InitCell;
@@ -120,7 +121,7 @@ pub(crate) fn get_vsock_driver() -> Option<&'static InterruptTicketMutex<VirtioV
 
 pub fn init_drivers(handlers: &mut InterruptHandlerMap) {
 	without_interrupts(|| {
-		let Some(fdt) = crate::env::fdt() else {
+		let Some(fdt) = crate::env::start_info().fdt() else {
 			error!("No device tree found, cannot initialize MMIO drivers");
 			return;
 		};

src/arch/aarch64/kernel/mod.rs

@@ -25,6 +25,8 @@ pub(crate) use self::processor::set_oneshot_timer;
 use crate::arch::aarch64::kernel::core_local::*;
 use crate::arch::aarch64::mm::paging::{BasePageSize, PageSize};
 use crate::config::*;
+#[cfg(any(feature = "uhyve", feature = "smp"))]
+use crate::env::BootInfoExt;
 
 #[repr(align(8))]
 pub(crate) struct AlignedAtomicU32(AtomicU32);
@@ -41,7 +43,7 @@ global_asm!(include_str!("start.s"));
 
 #[cfg(feature = "smp")]
 pub fn get_possible_cpus() -> u32 {
-	let fdt = crate::env::fdt().unwrap();
+	let fdt = crate::env::start_info().fdt().unwrap();
 	let cpu_count = fdt.cpus().count();
 	u32::try_from(cpu_count).unwrap()
 }
@@ -101,7 +103,7 @@ pub fn boot_next_processor() {
 
 	#[allow(clippy::needless_return)]
 	#[cfg(feature = "uhyve")]
-	if crate::env::is_uhyve() {
+	if crate::env::start_info().is_uhyve() {
 		return;
 	}
 
@@ -125,7 +127,7 @@ pub fn boot_next_processor() {
 			trace!("Virtual address of smp_start 0x{virt_start:x}");
 			trace!("Physical address of smp_start 0x{phys_start:x}");
 
-			let fdt = crate::env::fdt().unwrap();
+			let fdt = crate::env::start_info().fdt().unwrap();
 			let psci_node = fdt.find_node("/psci").unwrap();
 
 			let cpu_on = psci_node.property("cpu_on").unwrap().as_usize().unwrap();

src/arch/aarch64/kernel/pci.rs

@@ -15,7 +15,7 @@ use crate::arch::aarch64::kernel::core_local::core_id;
 use crate::arch::aarch64::kernel::interrupts::GIC;
 use crate::arch::aarch64::mm::paging::{self, BasePageSize, PageSize, PageTableEntryFlags};
 use crate::drivers::pci::{PCI_DEVICES, PciDevice};
-use crate::env;
+use crate::env::{self, BootInfoExt};
 use crate::mm::{PageAlloc, PageRangeAllocator};
 
 const PCI_MAX_DEVICE_NUMBER: u8 = 32;
@@ -222,7 +222,7 @@ fn detect_interrupt(
 }
 
 pub fn init() {
-	let fdt = env::fdt().unwrap();
+	let fdt = env::start_info().fdt().unwrap();
 
 	if let Some(pci_node) = fdt.find_compatible(&["pci-host-ecam-generic"]) {
 		let reg = pci_node.reg().unwrap().next().unwrap();

src/arch/aarch64/kernel/processor.rs

@@ -6,6 +6,8 @@ use hermit_sync::{Lazy, OnceCell, without_interrupts};
 
 use super::lscpu;
 use crate::env;
+#[cfg(feature = "uhyve")]
+use crate::env::BootInfoExt;
 
 /// Current FPU state. Saved at context switch when changed.
 ///
@@ -263,7 +265,7 @@ pub fn supports_2mib_pages() -> bool {
 
 pub fn configure() {
 	#[cfg(feature = "uhyve")]
-	if env::is_uhyve() {
+	if env::start_info().is_uhyve() {
 		return;
 	}
 

src/arch/aarch64/kernel/start.rs

@@ -267,7 +267,7 @@ unsafe extern "C" fn pre_init(boot_info: Option<&'static RawBootInfo>, cpu_id: u
 	dsb(SY);
 
 	if cpu_id == 0 {
-		env::set_boot_info(*boot_info.unwrap());
+		env::set_start_info(*boot_info.unwrap());
 		crate::boot_processor_main()
 	} else {
 		#[cfg(not(feature = "smp"))]

src/arch/aarch64/kernel/systemtime.rs

@@ -6,7 +6,7 @@ use memory_addresses::{PhysAddr, VirtAddr};
 use time::OffsetDateTime;
 
 use crate::arch::aarch64::mm::paging::{self, BasePageSize, PageSize, PageTableEntryFlags};
-use crate::env;
+use crate::env::{self, BootInfoExt};
 use crate::mm::{PageAlloc, PageRangeAllocator};
 
 static PL031_ADDRESS: OnceCell<VirtAddr> = OnceCell::new();
@@ -46,11 +46,11 @@ fn rtc_read(off: usize) -> u32 {
 
 fn boot_time() -> OffsetDateTime {
 	#[cfg(feature = "uhyve")]
-	if let Some(boot_time) = env::uhyve_boot_time() {
+	if let Some(boot_time) = env::start_info().uhyve_boot_time() {
 		return boot_time;
 	}
 
-	let fdt = env::fdt().unwrap();
+	let fdt = env::start_info().fdt().unwrap();
 	let Some(pl031_node) = fdt.find_compatible(&["arm,pl031"]) else {
 		error!("Could not find PL031 Real Time Clock to determine the boot time.");
 		return OffsetDateTime::UNIX_EPOCH;

src/arch/riscv64/kernel/devicetree.rs

@@ -43,7 +43,7 @@ use crate::drivers::virtio::transport::mmio as mmio_virtio;
 	not(feature = "pci"),
 ))]
 use crate::drivers::virtio::transport::mmio::VirtioDriver;
-use crate::env;
+use crate::env::{self, BootInfoExt};
 #[cfg(all(any(feature = "gem-net", feature = "virtio-net"), not(feature = "pci")))]
 use crate::executor::device::NETWORK_DEVICE;
 #[cfg(all(
@@ -68,7 +68,7 @@ enum Model {
 /// This function should only be called once
 pub fn init() {
 	debug!("Init devicetree");
-	let Some(fdt) = env::fdt() else {
+	let Some(fdt) = env::start_info().fdt() else {
 		return;
 	};
 
@@ -106,7 +106,7 @@ pub fn init() {
 /// This function should only be called once
 pub fn init_drivers(handlers: &mut InterruptHandlerMap) {
 	// TODO: Implement devicetree correctly
-	if let Some(fdt) = env::fdt() {
+	if let Some(fdt) = env::start_info().fdt() {
 		debug!("Init drivers using devicetree");
 
 		unsafe {

src/arch/riscv64/kernel/mod.rs

@@ -23,7 +23,7 @@ use crate::arch::riscv64::kernel::core_local::core_id;
 pub use crate::arch::riscv64::kernel::devicetree::init_drivers;
 use crate::arch::riscv64::kernel::processor::lsb;
 use crate::config::KERNEL_STACK_SIZE;
-use crate::env;
+use crate::env::{self, BootInfoExt};
 use crate::init_cell::InitCell;
 use crate::mm::{FrameAlloc, PageRangeAllocator};
 
@@ -60,7 +60,7 @@ pub fn get_hart_mask() -> u64 {
 }
 
 pub fn get_timebase_freq() -> u64 {
-	let fdt = env::fdt().unwrap();
+	let fdt = env::start_info().fdt().unwrap();
 
 	// Get timebase-freq
 	let cpus_node = fdt
@@ -150,7 +150,7 @@ pub fn boot_next_processor() {
 	CPU_ONLINE.fetch_add(1, Ordering::Release);
 
 	#[cfg(feature = "uhyve")]
-	if env::is_uhyve() {
+	if env::start_info().is_uhyve() {
 		return;
 	}
 

src/arch/riscv64/kernel/start.rs

@@ -9,7 +9,7 @@ use crate::arch::riscv64::kernel::CURRENT_STACK_ADDRESS;
 #[cfg(not(feature = "smp"))]
 use crate::arch::riscv64::kernel::processor;
 use crate::config::KERNEL_STACK_SIZE;
-use crate::env;
+use crate::env::{self, BootInfoExt};
 
 //static mut BOOT_STACK: [u8; KERNEL_STACK_SIZE] = [0; KERNEL_STACK_SIZE];
 
@@ -52,8 +52,8 @@ unsafe extern "C" fn pre_init(hart_id: usize, boot_info: Option<&'static RawBoot
 	if CPU_ONLINE.load(Ordering::Acquire) == 0 {
 		crate::logging::KERNEL_LOGGER.set_time(true);
 
-		env::set_boot_info(*boot_info.unwrap());
-		let fdt = env::fdt().unwrap();
+		env::set_start_info(*boot_info.unwrap());
+		let fdt = env::start_info().fdt().unwrap();
 		// Init HART_MASK
 		let mut hart_mask = 0;
 		for cpu in fdt.cpus() {

src/arch/x86_64/kernel/acpi.rs

@@ -11,7 +11,7 @@ use crate::arch::x86_64::mm::paging;
 use crate::arch::x86_64::mm::paging::{
 	BasePageSize, PageSize, PageTableEntryFlags, PageTableEntryFlagsExt,
 };
-use crate::env;
+use crate::env::{self, BootInfoExt, StartInfo};
 use crate::mm::{PageAlloc, PageRangeAllocator};
 
 /// Memory at this physical address is supposed to contain a pointer to the Extended BIOS Data Area (EBDA).
@@ -107,7 +107,7 @@ pub struct AcpiTable<'a> {
 
 impl AcpiTable<'_> {
 	fn map(physical_address: PhysAddr) -> Self {
-		if env::is_uefi() {
+		if env::start_info().is_uefi() {
 			// For UEFI Systems, the tables are already mapped so we only need to return a proper reference to the table
 			let allocated_virtual_address = VirtAddr::new(physical_address.as_u64());
 			let header = unsafe {
@@ -191,7 +191,7 @@ impl AcpiTable<'_> {
 
 impl Drop for AcpiTable<'_> {
 	fn drop(&mut self) {
-		if !env::is_uefi() {
+		if !env::start_info().is_uefi() {
 			let range = PageRange::from_start_len(
 				self.allocated_virtual_address.as_usize(),
 				self.allocated_length,
@@ -348,7 +348,7 @@ fn detect_rsdp(start_address: PhysAddr, end_address: PhysAddr) -> Result<&'stati
 /// Detects ACPI support of the computer system.
 /// Returns a reference to the ACPI RSDP within the Ok() if successful or an empty Err() on failure.
 fn detect_acpi() -> Result<&'static AcpiRsdp, ()> {
-	if let Some(rsdp) = env::rsdp() {
+	if let Some(rsdp) = env::start_info().rsdp_addr() {
 		trace!("RSDP detected successfully at {rsdp:#x?}");
 		let rsdp = unsafe {
 			ptr::with_exposed_provenance::<AcpiRsdp>(rsdp.get())
@@ -518,7 +518,7 @@ pub fn poweroff() {
 
 pub fn init() {
 	#[cfg(feature = "uhyve")]
-	if env::is_uhyve() {
+	if env::start_info().is_uhyve() {
 		return;
 	}
 

src/arch/x86_64/kernel/apic.rs

@@ -25,6 +25,7 @@ use crate::arch::x86_64::mm::paging::{
 	BasePageSize, PageSize, PageTableEntryFlags, PageTableEntryFlagsExt,
 };
 use crate::arch::x86_64::swapgs;
+use crate::env::BootInfoExt;
 use crate::mm::{PageAlloc, PageBox, PageRangeAllocator};
 use crate::scheduler::CoreId;
 use crate::{arch, env, scheduler};
@@ -306,7 +307,7 @@ pub fn local_apic_id_count() -> u32 {
 }
 
 fn init_ioapic_address(phys_addr: PhysAddr) {
-	if env::is_uefi() {
+	if env::start_info().is_uefi() {
 		// UEFI systems have already id mapped everything, so we can just set the physical address as the virtual one
 		IOAPIC_ADDRESS
 			.set(VirtAddr::new(phys_addr.as_u64()))
@@ -508,7 +509,7 @@ fn default_apic() -> PhysAddr {
 
 fn apic_addr() -> PhysAddr {
 	#[cfg(feature = "uhyve")]
-	if env::is_uhyve() {
+	if env::start_info().is_uhyve() {
 		return default_apic();
 	}
 
@@ -528,7 +529,7 @@ pub fn init() {
 	// Initialize x2APIC or xAPIC, depending on what's available.
 	if processor::supports_x2apic() {
 		init_x2apic();
-	} else if env::is_uefi() {
+	} else if env::start_info().is_uefi() {
 		// already id mapped in UEFI systems, just use the physical address as virtual one
 		LOCAL_APIC_ADDRESS
 			.set(VirtAddr::new(local_apic_physical_address.as_u64()))
@@ -765,7 +766,7 @@ pub fn boot_application_processors() {
 	);
 	debug!("SMP boot code is {} bytes long", smp_boot_code.len());
 
-	if env::is_uefi() {
+	if env::start_info().is_uefi() {
 		// Since UEFI already provides identity-mapped pagetables, we only have to sanity-check the identity mapping
 		let pt = unsafe { paging::identity_mapped_page_table() };
 		let virt_addr = SMP_BOOT_CODE_ADDRESS;

src/arch/x86_64/kernel/mod.rs

@@ -11,6 +11,8 @@ use x86_64::registers::control::{Cr0, Cr4};
 pub(crate) use self::apic::{set_oneshot_timer, wakeup_core};
 use crate::arch::x86_64::kernel::core_local::*;
 use crate::env;
+#[cfg(feature = "uhyve")]
+use crate::env::BootInfoExt;
 
 #[cfg(feature = "acpi")]
 pub mod acpi;
@@ -41,7 +43,7 @@ pub mod vga;
 #[cfg(feature = "smp")]
 pub fn get_possible_cpus() -> u32 {
 	#[cfg(feature = "uhyve")]
-	if let Some(num_cpus) = env::uhyve_num_cpus() {
+	if let Some(num_cpus) = env::start_info().uhyve_num_cpus() {
 		return num_cpus.get().try_into().unwrap();
 	}
 
@@ -111,7 +113,7 @@ pub fn application_processor_init() {
 
 fn finish_processor_init() {
 	#[cfg(feature = "uhyve")]
-	if env::is_uhyve() {
+	if env::start_info().is_uhyve() {
 		// uhyve does not use apic::detect_from_acpi and therefore does not know the number of processors and
 		// their APIC IDs in advance.
 		// Therefore, we have to add each booted processor into the CPU_LOCAL_APIC_IDS vector ourselves.
@@ -131,7 +133,7 @@ pub fn boot_next_processor() {
 	let cpu_online = CPU_ONLINE.fetch_add(1, Ordering::Release);
 
 	#[cfg(feature = "uhyve")]
-	if env::is_uhyve() {
+	if env::start_info().is_uhyve() {
 		return;
 	}
 
@@ -168,7 +170,7 @@ unsafe extern "C" fn pre_init(boot_info: Option<&'static RawBootInfo>, cpu_id: u
 	}
 
 	if cpu_id == 0 {
-		env::set_boot_info(*boot_info.unwrap());
+		env::set_start_info(*boot_info.unwrap());
 
 		crate::boot_processor_main()
 	} else {

src/arch/x86_64/kernel/processor.rs

@@ -27,7 +27,7 @@ use x86_64::{VirtAddr, instructions};
 #[cfg(feature = "acpi")]
 use crate::arch::x86_64::kernel::acpi;
 use crate::arch::x86_64::kernel::{interrupts, pic, pit};
-use crate::env;
+use crate::env::{self, BootInfoExt};
 
 /// See <http://biosbits.org>.
 const MSR_PLATFORM_INFO: u32 = 0xce;
@@ -352,7 +352,8 @@ impl CpuFrequency {
 
 	fn detect_from_fdt(&mut self) -> Result<(), ()> {
 		fn mhz_from_fdt() -> Option<NonZero<u16>> {
-			let khz = env::fdt()?
+			let khz = env::start_info()
+				.fdt()?
 				.find_node("/hermit,tsc")?
 				.property("khz")?
 				.as_usize()?;
@@ -370,7 +371,7 @@ impl CpuFrequency {
 	fn detect_from_hypervisor(&mut self) -> Result<(), ()> {
 		#[cfg(feature = "uhyve")]
 		{
-			let cpu_freq = env::uhyve_cpu_freq().ok_or(())?.get();
+			let cpu_freq = env::start_info().uhyve_cpu_freq().ok_or(())?.get();
 			let mhz = cpu_freq / 1000;
 
 			self.set_detected_cpu_frequency(