x86: Add has_address_size_prefix to Instruction#802
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Track whether the original encoding contained a 0x67 address-size prefix that had no semantic effect (i.e. the instruction has no memory operand). Backed by a free bit (bit 20) in InstrFlags1::flags1, following the same pattern as has_lock_prefix.
…0x67 OpCodeHandler_Prefix67 flips the address size and delegates to the real opcode handler. If the decoded instruction has no memory operand of any kind (OpKind >= MemorySegSI), the 0x67 byte had no semantic effect and was previously silently discarded. Record it via has_address_size_prefix so the encoder and formatters can reproduce the original bytes.
Extend write_prefixes() to emit the address-size prefix byte when instruction.has_address_size_prefix() is true, in addition to the existing EncoderFlags::P67 path that handles memory operands.
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Summary
has_address_size_prefixbit (bit 20 offlags1) toInstructionwith getter/setter0x67prefix appears on an instruction with no memory operand0x67inwrite_prefixes()when the bit is setBefore this change,
0x67on a non-memory instruction was silently discarded by the decoder, breaking round-trip encode/decode. NASM can reproduce the byte (a32 nop→67 90), so this fix enables NASM-text round-tripping for such instructions.Test plan
cargo test -p iced-x86passes67 90(32-bit), re-encode →67 90