amd_iommu: enable IOAPIC interrupt remapping#3728
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Interrupt remapping is required to support PCI device assignment to L2 guests under nested virtualization: without it, the IOMMU cannot enforce interrupt isolation for nested guests and the hypervisor will refuse to enable the feature. This wires IOAPIC interrupts through the AMD IOMMU's remapping table to satisfy that requirement. To make this work, the IOAPIC's PCIe RID is published in the IVRS DEV_SPECIAL(IOAPIC) entry so the guest IOMMU driver can locate the correct DTE; the hypervisor's IOAPIC routing implementation is then wrapped to remap MSI address/data through the IOMMU before forwarding routes, with retranslation triggered on INVALIDATE_INTERRUPT_TABLE commands.
jstarks
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Jun 11, 2026
jstarks
commented
Jun 11, 2026
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Pull request overview
This PR enables AMD IOMMU IOAPIC interrupt remapping so IOAPIC-sourced interrupts (e.g. legacy serial IRQs) are translated via the guest’s IRTEs, which is required for PCI device assignment to L2 guests under nested virtualization.
Changes:
- Publish an IOAPIC RID via an IVRS DEV_SPECIAL(IOAPIC) entry and add IVRS spec support for special-device entries.
- Introduce shared interrupt-remap plumbing (route registration + invalidation callbacks) and wire IOAPIC routing through the AMD IOMMU remapping table, including INVALIDATE_INTERRUPT_TABLE handling.
- Extend PCIe/IOMMU test coverage to validate IOAPIC interrupt remapping behavior from within the guest.
Reviewed changes
Copilot reviewed 12 out of 13 changed files in this pull request and generated 7 comments.
Show a summary per file
| File | Description |
|---|---|
| vmm_tests/vmm_tests/tests/tests/multiarch/pcie.rs | Adds a guest-side assertion that IOAPIC interrupts route via IR-IO-APIC and that counts increase under load. |
| vmm_core/src/acpi_builder.rs | Extends IVRS generation to optionally emit a DEV_SPECIAL(IOAPIC) entry. |
| vm/devices/pci/pcie/src/root.rs | Adds support for reserving root-bus device numbers and improves error reporting for invalid root complex layouts. |
| vm/devices/iommu/iommu_common/src/lib.rs | Introduces interrupt-remap traits plus a registry/list for invalidation-driven retranslation. |
| vm/devices/iommu/iommu_common/Cargo.toml | Adds parking_lot dependency for the new interrupt-remap registry mutex. |
| vm/devices/iommu/amd_iommu/src/lib.rs | Implements the new interrupt-remapper trait, tracks registered routes, and triggers retranslation on invalidation commands. |
| vm/acpi_spec/src/ivrs.rs | Adds IVRS constants and an 8-byte IVHD special device entry type for IOAPIC/HPET. |
| petri/src/vm/openvmm/construct.rs | Adds an explicit x86 earlycon kernel arg to flush early boot traces to ttyS0. |
| openvmm/openvmm_core/src/worker/dispatch/ioapic_iommu_wiring.rs | New IOAPIC routing wrapper that remaps MSI address/data via the IOMMU and supports retranslation. |
| openvmm/openvmm_core/src/worker/dispatch.rs | Wires in the swappable IOAPIC routing, reserves the IOAPIC phantom devfn, and builds IVRS config including IOAPIC RID. |
| openvmm/openvmm_core/Cargo.toml | Adds parking_lot for the new IOAPIC/IOMMU wiring module. |
| flowey/flowey_lib_hvlite/src/_jobs/cfg_versions.rs | Bumps OpenVMM deps version used by Flowey jobs. |
| Cargo.lock | Updates lockfile for added dependencies. |
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Interrupt remapping is required to support PCI device assignment to L2 guests under nested virtualization: without it, the IOMMU cannot enforce interrupt isolation for nested guests and the hypervisor will refuse to enable the feature. This wires IOAPIC interrupts through the AMD IOMMU's remapping table to satisfy that requirement.
To make this work, the IOAPIC's PCIe RID is published in the IVRS DEV_SPECIAL(IOAPIC) entry so the guest IOMMU driver can locate the correct DTE; the hypervisor's IOAPIC routing implementation is then wrapped to remap MSI address/data through the IOMMU before forwarding routes, with retranslation triggered on INVALIDATE_INTERRUPT_TABLE commands.