Fused ring RS: per-tile bitmask + drain-ring with owner-boundary flus…

[OpenDarrenlu]

Target: Three performance issues in the cross-rank communication path of the epilogue in the fused BF16 GEMM + push-ring reduce-scatter kernel (sm100_bf16_gemm_reduce_scatter_ring.cuh):

1. Coarse-grained per-segment flag — Downstream ranks must wait until the upstream rank has stored the entire owner segment before they can begin reducing any tile of that segment. This creates an R-stage body-synchronization ring with zero tile-level overlap.

2. 2-stage partial_buf pipeline — w3 (load) → WG1 (add) → WG2 (send) share a single 2-stage buffer. This cannot hide cross-rank load/store latency, causing backpressure on WG1 → TMEM fills up → MMA stalls.

3. Per-tile synchronous drain + barrier — WG2 performs tma_store_wait<0>() + NamedBarrier::sync on every tile. NVLink round-trip latency sits directly on the pipeline critical path.

Measured (4× GB200, tp=4, n=4096 k=2048):

M	Baseline	This Commit	Improvement	vs SGLang	vs Split
512	53.0 µs	47.4 µs	+11%	2.13×	1.03×
1024	63.2	57.8	+9%	1.79×	1.04×
2048	76.9	71.8	+7%	1.48×	1.11×
4096	108.9	106.6	+2%	1.15×	1.13×
8192	195.4	176.5	+10%	1.21×	1.26×

Correctness: Passed for M=256..8192 × 2 iters × 4 ranks (diff ~5e-6, same order of magnitude as baseline).